Loading...
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 | // SPDX-License-Identifier: GPL-2.0 /* * Intel Platform Monitory Technology Telemetry driver * * Copyright (c) 2020, Intel Corporation. * All Rights Reserved. * * Author: "Alexander Duyck" <alexander.h.duyck@linux.intel.com> */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/mm.h> #include <linux/pci.h> #include "intel_pmt_class.h" #define PMT_XA_START 0 #define PMT_XA_MAX INT_MAX #define PMT_XA_LIMIT XA_LIMIT(PMT_XA_START, PMT_XA_MAX) /* * Early implementations of PMT on client platforms have some * differences from the server platforms (which use the Out Of Band * Management Services Module OOBMSM). This list tracks those * platforms as needed to handle those differences. Newer client * platforms are expected to be fully compatible with server. */ static const struct pci_device_id pmt_telem_early_client_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x467d) }, /* ADL */ { PCI_VDEVICE(INTEL, 0x490e) }, /* DG1 */ { PCI_VDEVICE(INTEL, 0x9a0d) }, /* TGL */ { } }; bool intel_pmt_is_early_client_hw(struct device *dev) { struct pci_dev *parent = to_pci_dev(dev->parent); return !!pci_match_id(pmt_telem_early_client_pci_ids, parent); } EXPORT_SYMBOL_GPL(intel_pmt_is_early_client_hw); /* * sysfs */ static ssize_t intel_pmt_read(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, char *buf, loff_t off, size_t count) { struct intel_pmt_entry *entry = container_of(attr, struct intel_pmt_entry, pmt_bin_attr); if (off < 0) return -EINVAL; if (off >= entry->size) return 0; if (count > entry->size - off) count = entry->size - off; memcpy_fromio(buf, entry->base + off, count); return count; } static int intel_pmt_mmap(struct file *filp, struct kobject *kobj, struct bin_attribute *attr, struct vm_area_struct *vma) { struct intel_pmt_entry *entry = container_of(attr, struct intel_pmt_entry, pmt_bin_attr); unsigned long vsize = vma->vm_end - vma->vm_start; struct device *dev = kobj_to_dev(kobj); unsigned long phys = entry->base_addr; unsigned long pfn = PFN_DOWN(phys); unsigned long psize; if (vma->vm_flags & (VM_WRITE | VM_MAYWRITE)) return -EROFS; psize = (PFN_UP(entry->base_addr + entry->size) - pfn) * PAGE_SIZE; if (vsize > psize) { dev_err(dev, "Requested mmap size is too large\n"); return -EINVAL; } vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); if (io_remap_pfn_range(vma, vma->vm_start, pfn, vsize, vma->vm_page_prot)) return -EAGAIN; return 0; } static ssize_t guid_show(struct device *dev, struct device_attribute *attr, char *buf) { struct intel_pmt_entry *entry = dev_get_drvdata(dev); return sprintf(buf, "0x%x\n", entry->guid); } static DEVICE_ATTR_RO(guid); static ssize_t size_show(struct device *dev, struct device_attribute *attr, char *buf) { struct intel_pmt_entry *entry = dev_get_drvdata(dev); return sprintf(buf, "%zu\n", entry->size); } static DEVICE_ATTR_RO(size); static ssize_t offset_show(struct device *dev, struct device_attribute *attr, char *buf) { struct intel_pmt_entry *entry = dev_get_drvdata(dev); return sprintf(buf, "%lu\n", offset_in_page(entry->base_addr)); } static DEVICE_ATTR_RO(offset); static struct attribute *intel_pmt_attrs[] = { &dev_attr_guid.attr, &dev_attr_size.attr, &dev_attr_offset.attr, NULL }; ATTRIBUTE_GROUPS(intel_pmt); static struct class intel_pmt_class = { .name = "intel_pmt", .owner = THIS_MODULE, .dev_groups = intel_pmt_groups, }; static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, struct intel_pmt_header *header, struct device *dev, struct resource *disc_res) { struct pci_dev *pci_dev = to_pci_dev(dev->parent); u8 bir; /* * The base offset should always be 8 byte aligned. * * For non-local access types the lower 3 bits of base offset * contains the index of the base address register where the * telemetry can be found. */ bir = GET_BIR(header->base_offset); /* Local access and BARID only for now */ switch (header->access_type) { case ACCESS_LOCAL: if (bir) { dev_err(dev, "Unsupported BAR index %d for access type %d\n", bir, header->access_type); return -EINVAL; } /* * For access_type LOCAL, the base address is as follows: * base address = end of discovery region + base offset */ entry->base_addr = disc_res->end + 1 + header->base_offset; /* * Some hardware use a different calculation for the base address * when access_type == ACCESS_LOCAL. On the these systems * ACCCESS_LOCAL refers to an address in the same BAR as the * header but at a fixed offset. But as the header address was * supplied to the driver, we don't know which BAR it was in. * So search for the bar whose range includes the header address. */ if (intel_pmt_is_early_client_hw(dev)) { int i; entry->base_addr = 0; for (i = 0; i < 6; i++) if (disc_res->start >= pci_resource_start(pci_dev, i) && (disc_res->start <= pci_resource_end(pci_dev, i))) { entry->base_addr = pci_resource_start(pci_dev, i) + header->base_offset; break; } if (!entry->base_addr) return -EINVAL; } break; case ACCESS_BARID: /* * If another BAR was specified then the base offset * represents the offset within that BAR. SO retrieve the * address from the parent PCI device and add offset. */ entry->base_addr = pci_resource_start(pci_dev, bir) + GET_ADDRESS(header->base_offset); break; default: dev_err(dev, "Unsupported access type %d\n", header->access_type); return -EINVAL; } entry->guid = header->guid; entry->size = header->size; return 0; } static int intel_pmt_dev_register(struct intel_pmt_entry *entry, struct intel_pmt_namespace *ns, struct device *parent) { struct resource res = {0}; struct device *dev; int ret; ret = xa_alloc(ns->xa, &entry->devid, entry, PMT_XA_LIMIT, GFP_KERNEL); if (ret) return ret; dev = device_create(&intel_pmt_class, parent, MKDEV(0, 0), entry, "%s%d", ns->name, entry->devid); if (IS_ERR(dev)) { dev_err(parent, "Could not create %s%d device node\n", ns->name, entry->devid); ret = PTR_ERR(dev); goto fail_dev_create; } entry->kobj = &dev->kobj; if (ns->attr_grp) { ret = sysfs_create_group(entry->kobj, ns->attr_grp); if (ret) goto fail_sysfs; } /* if size is 0 assume no data buffer, so no file needed */ if (!entry->size) return 0; res.start = entry->base_addr; res.end = res.start + entry->size - 1; res.flags = IORESOURCE_MEM; entry->base = devm_ioremap_resource(dev, &res); if (IS_ERR(entry->base)) { ret = PTR_ERR(entry->base); goto fail_ioremap; } sysfs_bin_attr_init(&entry->pmt_bin_attr); entry->pmt_bin_attr.attr.name = ns->name; entry->pmt_bin_attr.attr.mode = 0440; entry->pmt_bin_attr.mmap = intel_pmt_mmap; entry->pmt_bin_attr.read = intel_pmt_read; entry->pmt_bin_attr.size = entry->size; ret = sysfs_create_bin_file(&dev->kobj, &entry->pmt_bin_attr); if (!ret) return 0; fail_ioremap: if (ns->attr_grp) sysfs_remove_group(entry->kobj, ns->attr_grp); fail_sysfs: device_unregister(dev); fail_dev_create: xa_erase(ns->xa, entry->devid); return ret; } int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_namespace *ns, struct platform_device *pdev, int idx) { struct intel_pmt_header header; struct resource *disc_res; int ret = -ENODEV; disc_res = platform_get_resource(pdev, IORESOURCE_MEM, idx); if (!disc_res) return ret; entry->disc_table = devm_platform_ioremap_resource(pdev, idx); if (IS_ERR(entry->disc_table)) return PTR_ERR(entry->disc_table); ret = ns->pmt_header_decode(entry, &header, &pdev->dev); if (ret) return ret; ret = intel_pmt_populate_entry(entry, &header, &pdev->dev, disc_res); if (ret) return ret; return intel_pmt_dev_register(entry, ns, &pdev->dev); } EXPORT_SYMBOL_GPL(intel_pmt_dev_create); void intel_pmt_dev_destroy(struct intel_pmt_entry *entry, struct intel_pmt_namespace *ns) { struct device *dev = kobj_to_dev(entry->kobj); if (entry->size) sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr); if (ns->attr_grp) sysfs_remove_group(entry->kobj, ns->attr_grp); device_unregister(dev); xa_erase(ns->xa, entry->devid); } EXPORT_SYMBOL_GPL(intel_pmt_dev_destroy); static int __init pmt_class_init(void) { return class_register(&intel_pmt_class); } static void __exit pmt_class_exit(void) { class_unregister(&intel_pmt_class); } module_init(pmt_class_init); module_exit(pmt_class_exit); MODULE_AUTHOR("Alexander Duyck <alexander.h.duyck@linux.intel.com>"); MODULE_DESCRIPTION("Intel PMT Class driver"); MODULE_LICENSE("GPL v2"); |