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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 | # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm RPMh Network-On-Chip Interconnect maintainers: - Georgi Djakov <georgi.djakov@linaro.org> - Odelu Kukatla <okukatla@codeaurora.org> description: | RPMh interconnect providers support system bandwidth requirements through RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is able to communicate with the BCM through the Resource State Coordinator (RSC) associated with each execution environment. Provider nodes must point to at least one RPMh device child node pertaining to their RSC and each provider can map to multiple RPMh resources. properties: reg: maxItems: 1 compatible: enum: - qcom,sc7180-aggre1-noc - qcom,sc7180-aggre2-noc - qcom,sc7180-camnoc-virt - qcom,sc7180-compute-noc - qcom,sc7180-config-noc - qcom,sc7180-dc-noc - qcom,sc7180-gem-noc - qcom,sc7180-ipa-virt - qcom,sc7180-mc-virt - qcom,sc7180-mmss-noc - qcom,sc7180-npu-noc - qcom,sc7180-qup-virt - qcom,sc7180-system-noc - qcom,sdm845-aggre1-noc - qcom,sdm845-aggre2-noc - qcom,sdm845-config-noc - qcom,sdm845-dc-noc - qcom,sdm845-gladiator-noc - qcom,sdm845-mem-noc - qcom,sdm845-mmss-noc - qcom,sdm845-system-noc - qcom,sdx55-ipa-virt - qcom,sdx55-mc-virt - qcom,sdx55-mem-noc - qcom,sdx55-system-noc - qcom,sm8150-aggre1-noc - qcom,sm8150-aggre2-noc - qcom,sm8150-camnoc-noc - qcom,sm8150-compute-noc - qcom,sm8150-config-noc - qcom,sm8150-dc-noc - qcom,sm8150-gem-noc - qcom,sm8150-ipa-virt - qcom,sm8150-mc-virt - qcom,sm8150-mmss-noc - qcom,sm8150-system-noc - qcom,sm8250-aggre1-noc - qcom,sm8250-aggre2-noc - qcom,sm8250-compute-noc - qcom,sm8250-config-noc - qcom,sm8250-dc-noc - qcom,sm8250-gem-noc - qcom,sm8250-ipa-virt - qcom,sm8250-mc-virt - qcom,sm8250-mmss-noc - qcom,sm8250-npu-noc - qcom,sm8250-system-noc - qcom,sm8350-aggre1-noc - qcom,sm8350-aggre2-noc - qcom,sm8350-config-noc - qcom,sm8350-dc-noc - qcom,sm8350-gem-noc - qcom,sm8350-lpass-ag-noc - qcom,sm8350-mc-virt - qcom,sm8350-mmss-noc - qcom,sm8350-compute-noc - qcom,sm8350-system-noc '#interconnect-cells': enum: [ 1, 2 ] qcom,bcm-voters: $ref: /schemas/types.yaml#/definitions/phandle-array description: | List of phandles to qcom,bcm-voter nodes that are required by this interconnect to send RPMh commands. qcom,bcm-voter-names: description: | Names for each of the qcom,bcm-voters specified. required: - compatible - reg - '#interconnect-cells' - qcom,bcm-voters additionalProperties: false examples: - | #include <dt-bindings/interconnect/qcom,sdm845.h> mem_noc: interconnect@1380000 { compatible = "qcom,sdm845-mem-noc"; reg = <0x01380000 0x27200>; #interconnect-cells = <1>; qcom,bcm-voters = <&apps_bcm_voter>; }; mmss_noc: interconnect@1740000 { compatible = "qcom,sdm845-mmss-noc"; reg = <0x01740000 0x1c1000>; #interconnect-cells = <1>; qcom,bcm-voter-names = "apps", "disp"; qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; }; |