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Defined in 7 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h, line 11258 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h, line 13400 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h, line 7183 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h, line 7390 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h, line 7431 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_2_offset.h, line 77 (as a macro)
- drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c, line 135 (as a macro)