Defined in 1 files as a struct:

• drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h, line 434 (as a struct)

Referenced in 18 files:

• drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c, line 457
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
  • line 586
  • line 674
  • line 689
  • line 869
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
  • line 666
  • line 707
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c, line 225
• drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.c, line 250
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
  • line 81
  • line 230
  • line 247
  • line 1068
  • line 1272
  • line 1277
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
  • line 249
  • line 288
• drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
  • line 1342
  • line 1344
• drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
  • line 79
  • line 129
  • line 171
  • line 254
  • line 259
• drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.h
  • line 124
  • line 128
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.c
  • line 426
  • line 466
• drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h, line 276
• drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h, line 50
• drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c, line 999
• drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.h, line 56
• drivers/gpu/drm/amd/display/dc/inc/core_types.h, line 364
• drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
  • line 92
  • line 99
  • line 187
• drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h, line 94