Elixir Cross Referencer

Open Menu / arch / powerpc / boot / dts / fsl / sbc8641d.dts
Loading...
  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * SBC8641D Device Tree Source
 *
 * Copyright 2008 Wind River Systems Inc.
 *
 * Paul Gortmaker (see MAINTAINERS for contact information)
 *
 * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
 */

/include/ "mpc8641si-pre.dtsi"

/ {
	model = "SBC8641D";
	compatible = "wind,sbc8641";

	memory {
		device_type = "memory";
		reg = <0x00000000 0x20000000>;	// 512M at 0x0
	};

	lbc: localbus@f8005000 {
		reg = <0xf8005000 0x1000>;

		ranges = <0 0 0xff000000 0x01000000	// 16MB Boot flash
			  1 0 0xf0000000 0x00010000	// 64KB EEPROM
			  2 0 0xf1000000 0x00100000	// EPLD (1MB)
			  3 0 0xe0000000 0x04000000	// 64MB LB SDRAM (CS3)
			  4 0 0xe4000000 0x04000000	// 64MB LB SDRAM (CS4)
			  6 0 0xf4000000 0x00100000	// LCD display (1MB)
			  7 0 0xe8000000 0x04000000>;	// 64MB OneNAND

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x01000000>;
			bank-width = <2>;
			device-width = <2>;
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				label = "dtb";
				reg = <0x00000000 0x00100000>;
				read-only;
			};
			partition@300000 {
				label = "kernel";
				reg = <0x00100000 0x00400000>;
				read-only;
			};
			partition@400000 {
				label = "fs";
				reg = <0x00500000 0x00a00000>;
			};
			partition@700000 {
				label = "firmware";
				reg = <0x00f00000 0x00100000>;
				read-only;
			};
		};

		epld@2,0 {
			compatible = "wrs,epld-localbus";
			#address-cells = <2>;
			#size-cells = <1>;
			reg = <2 0 0x100000>;
			ranges = <0 0 5 0 1	// User switches
				  1 0 5 1 1	// Board ID/Rev
				  3 0 5 3 1>;	// LEDs
		};
	};

	soc: soc@f8000000 {
		ranges = <0x00000000 0xf8000000 0x00100000>;

		enet0: ethernet@24000 {
			tbi-handle = <&tbi0>;
			phy-handle = <&phy0>;
			phy-connection-type = "rgmii-id";
		};

		mdio@24520 {
			phy0: ethernet-phy@1f {
				reg = <0x1f>;
			};
			phy1: ethernet-phy@0 {
				reg = <0>;
			};
			phy2: ethernet-phy@1 {
				reg = <1>;
			};
			phy3: ethernet-phy@2 {
				reg = <2>;
			};
			tbi0: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet1: ethernet@25000 {
			tbi-handle = <&tbi1>;
			phy-handle = <&phy1>;
			phy-connection-type = "rgmii-id";
		};

		mdio@25520 {
			tbi1: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet2: ethernet@26000 {
			tbi-handle = <&tbi2>;
			phy-handle = <&phy2>;
			phy-connection-type = "rgmii-id";
		};

		mdio@26520 {
			tbi2: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet3: ethernet@27000 {
			tbi-handle = <&tbi3>;
			phy-handle = <&phy3>;
			phy-connection-type = "rgmii-id";
		};

		mdio@27520 {
			tbi3: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};
	};

	pci0: pcie@f8008000 {
		reg = <0xf8008000 0x1000>;
		ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
		interrupt-map-mask = <0xff00 0 0 7>;

		pcie@0 {
			ranges = <0x02000000 0x0 0x80000000
				  0x02000000 0x0 0x80000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00100000>;
		};

	};

	pci1: pcie@f8009000 {
		reg = <0xf8009000 0x1000>;
		ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;

		pcie@0 {
			ranges = <0x02000000 0x0 0xa0000000
				  0x02000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00100000>;
		};
	};
};

/include/ "mpc8641si-post.dtsi"