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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2020 Microsemi Corporation */ / { #address-cells = <1>; #size-cells = <1>; compatible = "mscc,jr2"; aliases { serial0 = &uart0; serial1 = &uart2; gpio0 = &gpio; }; cpus { #address-cells = <1>; #size-cells = <0>; cpu@0 { compatible = "mips,mips24KEc"; device_type = "cpu"; clocks = <&cpu_clk>; reg = <0>; }; }; cpuintc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller; compatible = "mti,cpu-interrupt-controller"; }; cpu_clk: cpu-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <500000000>; }; ahb_clk: ahb-clk { compatible = "fixed-factor-clock"; #clock-cells = <0>; clocks = <&cpu_clk>; clock-div = <2>; clock-mult = <1>; }; ahb: ahb { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; interrupt-parent = <&intc>; cpu_ctrl: syscon@70000000 { compatible = "mscc,ocelot-cpu-syscon", "syscon"; reg = <0x70000000 0x2c>; }; intc: interrupt-controller@70000070 { compatible = "mscc,jaguar2-icpu-intr"; reg = <0x70000070 0x94>; #interrupt-cells = <1>; interrupt-controller; interrupt-parent = <&cpuintc>; interrupts = <2>; }; uart0: serial@70100000 { pinctrl-0 = <&uart_pins>; pinctrl-names = "default"; compatible = "ns16550a"; reg = <0x70100000 0x20>; interrupts = <6>; clocks = <&ahb_clk>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; }; uart2: serial@70100800 { pinctrl-0 = <&uart2_pins>; pinctrl-names = "default"; compatible = "ns16550a"; reg = <0x70100800 0x20>; interrupts = <7>; clocks = <&ahb_clk>; reg-io-width = <4>; reg-shift = <2>; status = "disabled"; }; gpio: pinctrl@71010038 { compatible = "mscc,jaguar2-pinctrl"; reg = <0x71010038 0x90>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&gpio 0 0 64>; uart_pins: uart-pins { pins = "GPIO_10", "GPIO_11"; function = "uart"; }; uart2_pins: uart2-pins { pins = "GPIO_24", "GPIO_25"; function = "uart2"; }; cs1_pins: cs1-pins { pins = "GPIO_16"; function = "si"; }; cs2_pins: cs2-pins { pins = "GPIO_17"; function = "si"; }; cs3_pins: cs3-pins { pins = "GPIO_18"; function = "si"; }; i2c_pins: i2c-pins { pins = "GPIO_14", "GPIO_15"; function = "twi"; }; i2c2_pins: i2c2-pins { pins = "GPIO_28", "GPIO_29"; function = "twi2"; }; }; i2c0: i2c@70100400 { compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; status = "disabled"; pinctrl-0 = <&i2c_pins>; pinctrl-names = "default"; reg = <0x70100400 0x100>, <0x700001b8 0x8>; #address-cells = <1>; #size-cells = <0>; interrupts = <8>; clock-frequency = <100000>; clocks = <&ahb_clk>; }; i2c2: i2c@70100c00 { compatible = "mscc,ocelot-i2c", "snps,designware-i2c"; status = "disabled"; pinctrl-0 = <&i2c2_pins>; pinctrl-names = "default"; reg = <0x70100c00 0x100>; #address-cells = <1>; #size-cells = <0>; interrupts = <8>; clock-frequency = <100000>; clocks = <&ahb_clk>; }; }; }; |