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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm NAND controller maintainers: - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> properties: compatible: enum: - qcom,ipq806x-nand - qcom,ipq4019-nand - qcom,ipq6018-nand - qcom,ipq8074-nand - qcom,sdx55-nand reg: maxItems: 1 clocks: items: - description: Core Clock - description: Always ON Clock clock-names: items: - const: core - const: aon "#address-cells": true "#size-cells": true patternProperties: "^nand@[a-f0-9]$": type: object properties: nand-bus-width: const: 8 nand-ecc-strength: enum: [1, 4, 8] nand-ecc-step-size: enum: - 512 allOf: - $ref: "nand-controller.yaml#" - if: properties: compatible: contains: const: qcom,ipq806x-nand then: properties: dmas: items: - description: rxtx DMA channel dma-names: items: - const: rxtx qcom,cmd-crci: $ref: /schemas/types.yaml#/definitions/uint32 description: Must contain the ADM command type CRCI block instance number specified for the NAND controller on the given platform qcom,data-crci: $ref: /schemas/types.yaml#/definitions/uint32 description: Must contain the ADM data type CRCI block instance number specified for the NAND controller on the given platform - if: properties: compatible: contains: enum: - qcom,ipq4019-nand - qcom,ipq6018-nand - qcom,ipq8074-nand - qcom,sdx55-nand then: properties: dmas: items: - description: tx DMA channel - description: rx DMA channel - description: cmd DMA channel dma-names: items: - const: tx - const: rx - const: cmd required: - compatible - reg - clocks - clock-names unevaluatedProperties: false examples: - | #include <dt-bindings/clock/qcom,gcc-ipq806x.h> nand-controller@1ac00000 { compatible = "qcom,ipq806x-nand"; reg = <0x1ac00000 0x800>; clocks = <&gcc EBI2_CLK>, <&gcc EBI2_AON_CLK>; clock-names = "core", "aon"; dmas = <&adm_dma 3>; dma-names = "rxtx"; qcom,cmd-crci = <15>; qcom,data-crci = <3>; #address-cells = <1>; #size-cells = <0>; nand@0 { reg = <0>; nand-ecc-strength = <4>; nand-bus-width = <8>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "boot-nand"; reg = <0 0x58a0000>; }; partition@58a0000 { label = "fs-nand"; reg = <0x58a0000 0x4000000>; }; }; }; }; #include <dt-bindings/clock/qcom,gcc-ipq4019.h> nand-controller@79b0000 { compatible = "qcom,ipq4019-nand"; reg = <0x79b0000 0x1000>; clocks = <&gcc GCC_QPIC_CLK>, <&gcc GCC_QPIC_AHB_CLK>; clock-names = "core", "aon"; dmas = <&qpicbam 0>, <&qpicbam 1>, <&qpicbam 2>; dma-names = "tx", "rx", "cmd"; #address-cells = <1>; #size-cells = <0>; nand@0 { reg = <0>; nand-ecc-strength = <4>; nand-bus-width = <8>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "boot-nand"; reg = <0 0x58a0000>; }; partition@58a0000 { label = "fs-nand"; reg = <0x58a0000 0x4000000>; }; }; }; }; ... |