# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2
---
$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Qualcomm Venus video encode and decode accelerators

maintainers:
  - Stanimir Varbanov <stanimir.varbanov@linaro.org>

description: |
  The Venus IP is a video encode and decode accelerator present
  on Qualcomm platforms

properties:
  compatible:
    const: qcom,msm8996-venus

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  power-domains:
    maxItems: 1

  clocks:
    maxItems: 4

  clock-names:
    items:
      - const: core
      - const: iface
      - const: bus
      - const: mbus

  iommus:
    maxItems: 20

  memory-region:
    maxItems: 1

  video-decoder:
    type: object

    properties:
      compatible:
        const: venus-decoder

      clocks:
        maxItems: 1

      clock-names:
        items:
          - const: core

      power-domains:
        maxItems: 1

    required:
      - compatible
      - clocks
      - clock-names
      - power-domains

    additionalProperties: false

  video-encoder:
    type: object

    properties:
      compatible:
        const: venus-encoder

      clocks:
        maxItems: 1

      clock-names:
        items:
          - const: core

      power-domains:
        maxItems: 1

    required:
      - compatible
      - clocks
      - clock-names
      - power-domains

    additionalProperties: false

  video-firmware:
    type: object

    description: |
      Firmware subnode is needed when the platform does not
      have TrustZone.

    properties:
      iommus:
        maxItems: 1

    required:
      - iommus

required:
  - compatible
  - reg
  - interrupts
  - power-domains
  - clocks
  - clock-names
  - iommus
  - memory-region
  - video-decoder
  - video-encoder

additionalProperties: false

examples:
  - |
        #include <dt-bindings/interrupt-controller/arm-gic.h>
        #include <dt-bindings/clock/qcom,mmcc-msm8996.h>

        video-codec@c00000 {
                compatible = "qcom,msm8996-venus";
                reg = <0x00c00000 0xff000>;
                interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mmcc VIDEO_CORE_CLK>,
                         <&mmcc VIDEO_AHB_CLK>,
                         <&mmcc VIDEO_AXI_CLK>,
                         <&mmcc VIDEO_MAXI_CLK>;
                clock-names = "core", "iface", "bus", "mbus";
                power-domains = <&mmcc VENUS_GDSC>;
                iommus =  <&venus_smmu 0x00>,
                          <&venus_smmu 0x01>,
                          <&venus_smmu 0x0a>,
                          <&venus_smmu 0x07>,
                          <&venus_smmu 0x0e>,
                          <&venus_smmu 0x0f>,
                          <&venus_smmu 0x08>,
                          <&venus_smmu 0x09>,
                          <&venus_smmu 0x0b>,
                          <&venus_smmu 0x0c>,
                          <&venus_smmu 0x0d>,
                          <&venus_smmu 0x10>,
                          <&venus_smmu 0x11>,
                          <&venus_smmu 0x21>,
                          <&venus_smmu 0x28>,
                          <&venus_smmu 0x29>,
                          <&venus_smmu 0x2b>,
                          <&venus_smmu 0x2c>,
                          <&venus_smmu 0x2d>,
                          <&venus_smmu 0x31>;
                memory-region = <&venus_mem>;

                video-decoder {
                        compatible = "venus-decoder";
                        clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
                        clock-names = "core";
                        power-domains = <&mmcc VENUS_CORE0_GDSC>;
                };

                video-encoder {
                        compatible = "venus-encoder";
                        clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
                        clock-names = "core";
                        power-domains = <&mmcc VENUS_CORE1_GDSC>;
                };
        };