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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 | # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Allwinner A31 CMOS Sensor Interface (CSI) Device Tree Bindings maintainers: - Chen-Yu Tsai <wens@csie.org> - Maxime Ripard <mripard@kernel.org> properties: compatible: enum: - allwinner,sun6i-a31-csi - allwinner,sun8i-a83t-csi - allwinner,sun8i-h3-csi - allwinner,sun8i-v3s-csi - allwinner,sun50i-a64-csi reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: Bus Clock - description: Module Clock - description: DRAM Clock clock-names: items: - const: bus - const: mod - const: ram resets: maxItems: 1 port: $ref: /schemas/graph.yaml#/$defs/port-base properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false properties: bus-width: enum: [ 8, 10, 12, 16 ] pclk-sample: true hsync-active: true vsync-active: true required: - bus-width additionalProperties: false required: - compatible - reg - interrupts - clocks - clock-names - resets additionalProperties: false examples: - | #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/sun8i-v3s-ccu.h> #include <dt-bindings/reset/sun8i-v3s-ccu.h> csi1: csi@1cb4000 { compatible = "allwinner,sun8i-v3s-csi"; reg = <0x01cb4000 0x1000>; interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_CSI>, <&ccu CLK_CSI1_SCLK>, <&ccu CLK_DRAM_CSI>; clock-names = "bus", "mod", "ram"; resets = <&ccu RST_BUS_CSI>; port { /* Parallel bus endpoint */ csi1_ep: endpoint { remote-endpoint = <&adv7611_ep>; bus-width = <16>; /* * If hsync-active/vsync-active are missing, * embedded BT.656 sync is used. */ hsync-active = <0>; /* Active low */ vsync-active = <0>; /* Active low */ pclk-sample = <1>; /* Rising */ }; }; }; ... |