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Defined in 10 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h, line 71 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h, line 67 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h, line 69 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 75 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 91 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 196 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 382 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 676 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 781 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h, line 1165 (as a macro)