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Defined in 9 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_3_1_d.h, line 54 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h, line 60 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h, line 52 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 58 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 74 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 164 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 578 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 741 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h, line 1121 (as a macro)