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Defined in 7 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 43 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 54 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 106 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 232 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 942 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 867 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_3_0_0_offset.h, line 1285 (as a macro)